FUJITSU SEMICONDUCTOR DATA SHEET
DS04-27234-1E
ASSP For Power Supply Applications (Secondary Battery)
DC/DC Converter IC for Charging Li-ion Battery
with Synchronous Rectifier
MB39A107
s DESCRIPTION
The MB39A107 is a DC/DC converter IC suitable for down-conversion, using pulse-width modulation (PWM) charging and enabling output voltage to be set to any desired level from 1 cell to 4 cells. The MB39A107 adopts output for Nch MOS drive of synchronous rectification type. The MB39A107 can be used to monitor the current in an AC adapter or battery, as it contains a current amplifier that can set an offset voltage. It can also be used for applications such as setting the charging voltages for 2 batteries. The MB39A107 provides a broad power supply voltage range and low standby current as well as high efficiency, making it ideal for use as a built-in charging device in products such as notebook PC.
s FEATURES
* * * * * * Built-in low-current control circuits in two systems (supporting dynamically controlled charging) The charge current value can be analog controlled (+INE1 and +INE2 terminal) Built-in synchronous rectification system output for Nch MOS FET Built-in charge pump for driving high-side Nch MOS, providing 100% on-duty support Built-in AC adapter detection function Output voltage setting accuracy : 4.2 V 0.74 % (Ta = - 10 C to + 85 C)
(Continued)
s PACKAGE
30-pin plastic TSSOP
(FPT-30P-M04)
MB39A107
(Continued) * Built-in high accuracy current detection amplifier : 5 % (input voltage difference at 100 mV) : 15 % (input voltage difference at 20 mV) * Output voltage setting using external resistor : 1 cell to 4 cells * Oscillation frequency range : 100 kHz to 1 MHz * In standby mode, leave output voltage setting resistor open to prevent inefficient current loss. * Built-in standby current function : 0 A (Typ) * Built-in soft-start function independent of loads
2
MB39A107
s PIN ASSIGNMENT
(TOP VIEW)
VCC +INUV OUTC1 -INC1 +INC1 IOFA1 +INE1 -INE1 FB1
1
30
VB
2
29
CB
3
28
OUT-1
4
27
VS
5
26
OUT-2
6
25
PGND
7
24
OUT-CP
8
23
CTL-2
9
22
CTL-1
OUTC2 -INC2 +INC2 +INE2 -INE2 FB23
10
21
GND
11
20
VREF
12
19
RT
13
18
CS
14
17
OUTD -INE3
15
16
(FPT-30P-M04)
3
MB39A107
s PIN DESCRIPTION
Pin No. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 Symbol VCC + INUV OUTC1 - INC1 + INC1 IOFA1 + INE1 - INE1 FB1 OUTC2 - INC2 + INC2 + INE2 - INE2 FB23 - INE3 OUTD CS RT VREF GND CTL-1 CTL-2 OUT-CP PGND OUT-2 VS OUT-1 CB VB I/O I O I I I I I O O I I I I O I O O I I O O O O Descriptions Reference voltage, control circuit power supply terminal Low input voltage detection comparater (UV Comp.) input terminal Current detection amplifier (Current Amp1) output terminal Current detection amplifier (Current Amp1) input terminal Current detection amplifier (Current Amp1) input terminal Current detection amplifier (Current Amp1) offset voltage input terminal Error amplifier (Error Amp1) non-inverted input terminal Error amplifier (Error Amp1) inverted input terminal Error amplifier (Error Amp1) output terminal Current detection amplifier (Current Amp2) output terminal Current detection amplifier (Current Amp2) input terminal Current detection amplifier (Current Amp2) input terminal Error amplifier (Error Amp2) non-inverted input terminal Error amplifier (Error Amp2) inverted input terminal Error amplifier (Error Amp2, 3) output terminal Error amplifier (Error Amp3) inverted input terminal With IC in standby mode, this terminal is set to Hi-Z to prevent loss of current through output voltage setting resistance. Set CTL terminal to "H" level to output "L" level. Soft-start capacitor connection terminal Triangular waveform oscillation frequency setting resistor connection terminal Reference voltage output terminal Ground terminal DC/DC converter block power supply control terminal Current detection amplifier (Current Amp1) power supply control terminal External main-side FET charge pump output terminal for driving gate Ground teriminal External synchronous rectification-side FET output terminal for driving gate External main-side FET source connection terminal External main-side FET output terminal for driving gate This terminal generates a voltage of "VCC + about 5 V" with a capacitor and an SBD connected to the OUT-CP, VB, and CB terminals. Output circuit bias output terminal
4
MB39A107
s BLOCK DIAGRAM
OUTC1 3 +INC1 -INC1 IOFA1 5 4 6 + x25 - Offset adjustment VREF
+INUV 2 + - 4.05 V/4.20 V
VCC 1
<-INE Comp.> - -INE1 +INE1 8 7 - + + + 4.2 V FB1 9 Dead Time Modulation + + - VREF -2.5 V -1.5 V + 3.92 V/4.00 V
VB Reg. (6.0 V)
30 VB
29 CB
Drv -1
28 OUT-1 27 VS
-INE2 14 OUTC2 10 +INC2 12 -INC2 11 +INE2 13 + x25 -
Drv -2
26 OUT-2
- + +
Drv -CP
24 OUT-CP 25 PGND
FB23 15
H : UVLO, UV release
UVLO -INE3 16 OUTD 17 - + + 4.2 V VREF 10 A CS 18 CT 45 pF 19 RT 4.2 V bias
VB UVLO VREF UVLO
Current Amp1 ON/OFF VCC
23 CTL-2
DC/DC ON/OFF
22 CTL-1
VREF 5.0 V 20 VREF 21 GND
5
MB39A107
s ABSOLUTE MAXIMUM RATINGS
Parameter Power supply voltage Boot voltage Control input voltage Output current Power dissipation Storage temperature Symbol VCC VCB VCTL IoUT PD TSTG Ta +25 C CB terminal CTL-1 terminal, CTL-2 terminal Condition Rating Min - 55 Max 27 32 27 60 1390* +125 Unit V V V mA mW C
* : The packages are mounted on the dual-sided epoxy board (10 cm x 10 cm) . WARNING: Semiconductor devices can be permanently damaged by application of stress (voltage, current, temperature, etc.) in excess of absolute maximum ratings. Do not exceed these ratings.
6
MB39A107
s RECOMMENDED OPERATING CONDITIONS
Parameter Power supply voltage Boot voltage Reference voltage output current Bias output current Symbol VCC VCB IREF IVB VINE Input voltage VINC VINUV IOFA1 terminal input voltage OUTD terminal output voltage OUTD terminal output current CTL terminal input voltage Output current VIOFA1 VOUTD IOUTD VCTL IOUT IOUT Peak output current IOUT Oscillation frequency Timing resistor Soft-start capacitor Charge pump capacitor CB terminal capacitor Bias output capacitor Reference voltage output capacitor Operating ambient temperature fOSC RT CS CCP CCB CVB CREF Ta CB terminal VREF terminal VB terminal + INE1, + INE2, + INE3, - INE1, - INE2 terminal + INC1, + INC2, - INC1, - INE2 terminal + INUV terminal Main side Duty 5% (t = 1/fosc x Duty) Synchronous rectification side Duty 5% (t = 1/fosc x Duty) Condition Value Min 7 -1 -1 0 0 0 0 0 0 0 - 45 - 800 - 1200 100 22 0.47 0.47 - 30 Typ 500 47 0.022 0.33 1.0 1.0 0.1 + 25 Max 25 30 0 0 VCC - 1.8 VCC VCC 5 17 2 25 + 45 + 800 + 1200 1000 200 1.0 1.0 + 85 Unit V V mA mA V V V V V mA V mA mA mA kHz k F F F F F C
WARNING: The recommended operating conditions are required in order to ensure the normal operation of the semiconductor device. All of the device's electrical characteristics are warranted when the device is operated within these ranges. Always use semiconductor devices within their recommended operating condition ranges. Operation outside these ranges may adversely affect reliability and could result in device failure. No warranty is made with respect to uses, operating conditions, or combinations not represented on the data sheet. Users considering application outside the listed conditions are advised to contact their FUJITSU representatives beforehand.
7
MB39A107
s ELECTRICAL CHARACTERISTICS
(VCC = 19 V, VB = 0 mA, VREF = 0 mA, Ta = + 25 C) Parameter Output voltage Reference Voltage Input stability Block Load stability [Ref] Short-circuit output current Under Voltage (VCC) Lockout Circuit Block [UVLO] Soft-start Circuit Block [SOFT] Triangular Wave Oscillator Block [OSC] Threshold voltage Hysteresis width Threshold voltage Hysteresis width Symbol VREF1 VREF2 Line Load los VTLH VTHL VH VTLH VTHL VH Pin No. 20 20 20 20 20 30 30 30 20 20 20 VREF = VREF = RT = 47 k Ta = - 30 C to +85 C FB1 = 2 V, Ta = +25 C FB1 = 2 V, Ta = - 10 C to +85 C FB1 = 2 V - INE1 = + INE1 = 0 V Conditions Ta = + 25 C Ta = - 10 C to + 85 C VCC = 7 V to 25 V VREF = 0 mA to - 1 mA VREF = 1 V VB = VB = Value Min 4.967 4.95 - 50 3.80 3.10 0.49 2.6 2.4 0.05 - 14 450 4.179 4.169 - 100 FB1 = 2 V FB1 = 2 V 4.8 2.0 Typ 5.000 5.00 3 1 - 25 4.00 3.30 0.70 2.8 2.6 0.20 - 10 500 1* 4.200 4.200 1 - 30 100* 1.2* 5.0 0.8 - 120 4.0 Max 5.041 5.05 10 10 - 12 4.20 3.50 0.91 3.0 2.8 0.35 -6 550 4.221 4.231 5 0.9 - 60 Unit V V mV mV mA V V V V V V A kHz % V V mV nA dB MHz V V A mA
Charge current
ICS
18
Oscillation frequency Frequency temperature variation
fOSC fOSC/ fOSC VTH1
28 28 8, 9 8, 9 7, 8 7, 8
Threshold voltage Input offset voltage Input bias current Error Amp Block Voltage gain [Error Amp1] Frequency bandwidth Output voltage Output source current Output sink current * : Standard design value
VTH2 VIO IB AV BW VFBH VFBL ISOURCE ISINK
7, 8, DC 9 7, 8, AV = 0 dB 9 9 9 9 9
(Continued)
8
MB39A107
(VCC = 19 V, VB = 0 mA, VREF = 0 mA, Ta = + 25 C) Parameter Input offset voltage Input bias current Voltage gain Symbol VIO IB AV Pin No. 13, 14 13, 14 13, 14, 15 13, 14, 15 15 15 15 15 15, 16 15, 16 15, 16 15, 16 15 15 15 15 17 17 3 3 3 3 FB23 = 2 V FB23 = 2 V OUTD = 17 V OUTD = 1 mA FB23 = 2 V FB23 = 2 V FB23 = 2 V, Ta = +25 C FB23 = 2 V, Ta = - 10 C to +85 C DC AV = 0 dB Conditions FB23 = 2 V - INE2 = + INE2 = 0 V DC Value Min - 100 Typ 1 - 30 100* Max 5 Unit mV nA dB
Error Amp Block [Error Frequency bandwidth Amp2] Output voltage Output source current Output sink current
BW VFBH VFBL ISOURCE ISINK VTH1
AV = 0 dB
4.8 2.0
1.2* 5.0 0.8 - 120 4.0
0.9 - 60
MHz V V A mA V V dB MHz V V A mA A V V V V V/V
4.179 4.200 4.221 4.169 4.200 4.231 4.8 2.0 100* 1.2* 5.0 0.8 - 120 4.0 0 35 2.5 0.5 2.5 0.5 25 0.9 - 60 1 50 2.625 0.575 2.75 0.75 25.75
Threshold voltage VTH2 Voltage gain Error Amp Frequency bandwidth Block [Error Output voltage Amp3] Output source current Output sink current OUTD terminal output leakage current OUTD terminal output ON resistor AV BW VFBH VFBL ISOURCE ISINK ILEAK RON VOUTC1 Current Detection Amp Block [Current Amp1] VOUTC2 VOUTC3 VOUTC4 Voltage gain * : Standard design value AV
+ INC1 = 9 V to VCC, 2.375 VIN = - 100 mV, IOFA1 = 0 V + INC1 = 9 V to VCC, VIN = - 20 mV, IOFA1 = 0 V + INC1 = 0 V to 9 V, VIN = - 100 mV, IOFA1 = 0 V + INC1 = 0 V to 9 V, VIN = - 100 mV, IOFA1 = 0 V 0.425 2.25 0.25 24.25
Current detection voltage
3, 4, + INC1 = 3 V to VCC, 5 VIN = - 20 mV, IOFA1 = 0 V
(Continued)
9
MB39A107
(VCC = 19 V, VB = 0 mA, VREF = 0 mA, Ta = + 25 C) Parameter Symbol IINC1 Input current IINC2 BW IOFA1 VOUTCH VOUTCL ISINK VOUTC1 VOUTC2 VOUTC3 VOUTC4 Pin No. 4, 5 4, 5 Conditions + INC1 = - INC1 = 19 V CTL-2 = 0 V, + INC1 = - INC1 = 19 V Value Min - 100 5.3 150 Typ 50 0 0.2* - 30 5.6 20 -2 300 2.5 0.5 2.5 0.5 Max 75 1 200 -1 2.625 0.575 2.75 0.75 Unit A A MHz nA V mV mA A V V V V
Current Detection Amp Block [Current Amp1]
Frequency bandwidth IOFA1 terminal input current Output voltage
3, 4, AV = 0 dB 5 6 3 3 3 3 10 10 10 10 10, 11, 12 11, 12 11, 12 10, 11, 12 10 10 10 10 OUTC2 = 2 V OUTC2 = 2 V OUTC = 2 V OUTC = 2 V IOFA1 = 2.5 V
Output source current ISOURCE Output sink current
+ INC2 = 9 V to VCC, 2.375 VIN = - 100 mV, IOFA1 = 0 V + INC2 = 9 V to VCC, VIN = - 20 mV, IOFA1 = 0 V + INC2 = 0 V to 9 V, VIN = - 100 mV, IOFA1 = 0 V + INC2 = 0 V to 9 V, VIN = - 100 mV, IOFA1 = 0 V + INC2 = 3 V to VCC, VIN = - 100 mV + INC2 = - INC2 = 19 V CTL-1 = 0 V, + INC2 = - INC2 = 19 V AV = 0 dB 0.425 2.25 0.25
Current detection voltage
Current Detection Amp Block [Current Amp2]
Voltage gain
AV
24.25 5.3 150 1.4
25
25.75
V/V A A MHz V mV mA A V V
IINC1 Input current IINC2
50 0
75 1 200 -1 2.6
Frequency bandwidth
BW VOUTCH VOUTCL ISINK VTL VTH
0.2* 5.6 20 -2 300 1.5 2.5
Output voltage
Output source current ISOURCE Output sink current PWM Comparator Block Threshold voltage [PWM Comp.] * : Standard design value
9, 15 Duty cycle = 0% 9, 15 Duty cycle = 100%
(Continued)
10
MB39A107
(Continued)
(VCC = 19 V, VB = 0 mA, VREF = 0 mA, Ta = + 25 C) Parameter Symbol ISOURCE Output source current Output Block [Drv-1, 2] Pin No. 28 Conditions Main side, Duty 5% (t = 1/fOSC x Duty) Synchronous rectification side, Duty 5% (t = 1/fOSC x Duty) Main side, Duty 5% (t = 1/fOSC x Duty) Synchronous rectification side, Duty 5% (t = 1/fOSC x Duty) OUT-CP = - 45 mA OUT-CP = 10 V + INUV = + INUV = + INUV = 0 V - INE3 = - INE3 = Value Min 4.12 3.97 - 200 3.89 3.85 Typ - 600* - 800* 800* Max 10 4.28 4.13 3.97 3.93 Unit mA
ISOURCE
26
mA
ISINK Output sink current ISINK tD1 tD2 ROH ISINK VTLH VTHL VH IINUV VTLH VTHL
28
mA
26 26, 28 26, 28 24 24 2, 28 2, 28 2, 28 2 16 16
1000* 100* 100* 2 200* 4.2 4.05 0.15 - 100 3.93 3.89
mA ns ns mA V V V nA V V
Dead time Charge Output ON resistor Pump Block Output sink current [Drv-CP] Low Input Threshold voltage Voltage Detection Comparator Hysteresis width Block Input bias current [UV Comp.] Battery Threshold voltage Voltage Detection Comparator Block Hysteresis width [ - INE Comp.] Bias Voltage Block [VB] Control Block [CTL] Output voltage ON condition OFF condition Input current Standby current General Power supply current
VH
16
0.04
V
VB VON VOFF ICTLH ICTLL ICCS ICC1 ICC2 ICC3
30
5.9 2 0
6 100 0 0 12 10.5 2.1
6.1 25 0.8 150 1 10 18 15.8 3.2
V V V A A A mA mA mA
22, 23 CTL-1, CTL-2 terminal 22, 23 CTL-1, CTL-2 terminal 22, 23 CTL-1 = CTL-2 = 5 V 22, 23 CTL-1 = CTL-2 = 0 V 1 1 1 1 CTL-1 = CTL-2 = 0 V CTL-1 = CTL-2 = 5 V CTL-1 = 5 V, CTL-2 = 0 V CTL-1 = 0 V, CTL-2 = 5 V
* : Standard design value
11
MB39A107
s TYPICAL CHARACTERISTICS
Power Supply Current vs. Power Supply Voltage Power supply current ICC (mA)
10 8 6 4 2 0 0 5 10 15 20 25 Ta = +25 C CTL1 = 5 V CTL2 = 5 V RT = OPEN
Power Supply Current vs. Power Supply Voltage Power supply current ICC (mA)
10 8 6 4 2 0 0 5 10 15 20 25 Ta = +25 C CTL1 = 5 V CTL2 = 0 V RT = OPEN
Power supply voltage VCC (V)
Power supply voltage VCC (V)
Power Supply Current vs. Power Supply Voltage Power supply current ICC (mA)
10 8 6 4 2 0 0 5 10 15 20 25 Ta = +25 C CTL1 = 0 V CTL2 = 5 V RT = OPEN
Power supply voltage VCC (V)
CTL1 Terminal Current, Reference Voltage vs. CTL1 Terminal Voltage CTL1 terminal current ICTL (A)
1000 900 800 700 600 500 400 300 200 100 0 0 5 10 15 20 25 ICTL VREF Ta = +25 C VCC = 19 V VREF = 0 mA 10
CTL2 Terminal Current, Reference Voltage vs. CTL2 Terminal Voltage CTL2 terminal current ICTL (A)
1000 900 800 700 600 500 400 300 200 100 0 0 5 10 15 20 25 ICTL VREF Ta = +25 C VCC = 19 V VREF = 0 mA 10 9 8 7 6 5 4 3 2 1 0 30
Reference voltage VREF (V)
9 8 7 6 5 4 3 2 1 0 30
CTL1 terminal voltage VCTL (V)
CTL2 terminal voltage VCTL (V)
(Continued)
12
Reference voltage VREF (V)
MB39A107
Reference Voltage vs. Power Supply Voltage
10 10
Reference Voltage vs. Load Current Reference voltage VREF (V)
Ta = +25 C VCC = 19 V CTL1 = 5 V CTL2 = 5 V
Reference voltage VREF (V)
8 6 4 2 0 0 5 10 15
Ta = +25 C CTL1 = 5 V CTL2 = 5 V VREF = 0 mA
8 6 4 2 0 0 5 10 15 20 25
20
25
30
35
Power supply voltage VCC (V)
Load current IREF (mA)
Reference Voltage vs. Ambient Temperature Reference voltage VREF (V)
5.08 5.06 5.04 5.02 5.00 4.98 4.96 4.94 4.92 -40 -20 0 20 40 60 80 100 VCC = 19 V CTL1 = 5 V CTL2 = 5 V VREF = 0 mA
Triangular Wave Oscillation Frequency vs. Timing Resistor
10000
Triangular wave oscillation frequency fOSC (kHz)
Ta = +25 C VCC = 19 V CB = 25 V CTL1 = 5 V CTL2 = 5 V
1000
100
Ambient temperature Ta ( C)
10 1 10 100 1000
Timing resistor RT (k)
Triangular Wave Oscillation Frequency vs. Ambient Temperature Triangular wave oscillation frequency fOSC (kHz)
560 540 520 500 480 460 440 -40 -20
Triangular Wave Oscillation Frequency vs. Power Supply Voltage
560
Triangular wave oscillation frequency fOSC (kHz)
VCC = 19 V CB = 25 V CTL1 = 5 V CTL2 = 5 V RT = 47 k
540 520 500 480 460 440 0 5 10 15
Ta = +25 C CB = VCC + 6 V CTL1 = 5 V CTL2 = 5 V RT = 47 k
0
20
40
60
80
100
Ambient temperature Ta ( C)
20
25
30
Power supply voltage VCC (V)
(Continued)
13
MB39A107
Error Amplifier 1 Threshold Voltage vs. Ambient Temperature
4.25 4.25
Error Amplifier 3 Threshold Voltage vs. Ambient Temperature Error amplifier 3 threshold voltage VTH (V)
VCC = 19 V CTL1 = 5 V CTL2 = 5 V
Error amplifier 1 threshold voltage VTH (V)
4.24 4.23 4.22 4.21 4.20 4.19 4.18 4.17 4.16 4.15 -40
VCC = 19 V CTL1 = 5 V CTL2 = 5 V
4.24 4.23 4.22 4.21 4.20 4.19 4.18 4.17 4.16 4.15 -40 -20 0 20 40 60
Ambient temperature Ta ( C)
-20
0
20
40
60
80
100
80
100
Ambient temperature Ta ( C)
Error Amplifer, Gain and Phase vs. Frequency
40 30 Ta = +25 C VCC = 19 V AV 180 240 k
10 0 -10 -20 -30 -40 1k 10 k 100 k 1M -90 0
Phase (deg)
20
90
Gain AV (dB)
10 k 1 F 8 2.4 k (14) 7 10 k (13)
+
- + + 4.2 V (CS) 9 (15) OUT Error Amp1 (Error Amp2)
IN
-180 10 M
Frequency f (Hz) Error Amplifier, Gain and Phase vs. Frequency
40 30 Ta = +25 C VCC = 19 V AV 180 240 k 90
Gain AV (dB)
20 10 0 -10 -20 -30 - 40 1k 10 k 100 k 1M
Phase (deg)
10 k 1 F 16 2.4 k 10 k IN CS - + + 4.2 V 15 OUT Error Amp3
+
0 -90
-180 10 M
Frequency f (Hz)
(Continued)
14
MB39A107
(Continued)s
Current Detection Amplifier, Gain and Phase vs. Frequency
40 30 Ta = +25 C VCC = 19 V 180 VCC = 19 V
Gain AV (dB)
20 10 0 -10 -20 -30 - 40 1k 10 k 100 k 1M AV
90
Phase (deg)
10 k 1 F
+
0 -90 -180 10 M
10 k IN
5+ 100 mV (12) 4- (11) 12.6 V
3 (10) OUT
Current Amp1 (IOFA1 = 0 V) (Current Amp2)
Frequency f (Hz)
Power Dissipation vs. Ambient Temperature Power dissipation PD (mW)
800 740 700 600 500 400 300 200 100 0 -40 -20 0 20 40 60 80 100
Ambient temperature Ta ( C)
15
MB39A107
s FUNCTIONAL DESCRIPTION
1. DC/DC Converter Functions
(1) Reference voltage block (REF) The reference voltage circuit generates a temperature-compensated reference voltage (5.0 V Typ) using the voltage supplied from the VCC terminal (pin 1) . The voltage is used as the reference voltage for the IC's internal circuit. The reference voltage can be used to supply a load current of up to 1 mA to an external device through the VREF terminal (pin 20) . (2) Triangular wave oscillator block (OSC) The triangular wave oscillator incorporates a triangular oscillation frequency setting capacitor connected respectively to the RT terminal (pin 19) to generate triangular oscillation waveforms. The triangular oscillation waveforms are input to the IC's internal PWM comparator. (3) Error amplifier block (Error Amp1) The error amplifier detects output signal of current detection amplifier (Current Amp2) and outputs PWM control signal by comparison with +INE1 terminal (pin 7), also controls charge current. Charge current controls by this amplifier and by the error amplifier (Error Amp2) allow two constant current values to be set to offer fail-safe control. By connecting a feedback resistor and capacitor between FBI terminal (pin 9) and - INE1 terminal (pin 8), it is possible to create any desired level of loop gain, thereby providing stable phase compensation to the system. Also, it is possible to prevent rush current at power supply start-up by connecting a soft-start capacitor with the CS terminal (pin 18). The use of Error amplifier for soft-start detection makes it possible for a system to operate on a fixed soft-start time that is independent of the output load. The amplifier can serve for constant current control in combination with the current detection amplifier (Current Amp1) . (4) Error amplifier block (Error Amp2) The error amplifier detects output signal of current detection amplifier (Current Amp2) and outputs PWM control signal by comparison with +INE2 terminal (pin 13), also controls charge current. By connecting a feedback resistor and capacitor between FB23 terminal (pin 15) and - INE2 terminal (pin 14), it is possible to create any desired level of loop gain, thereby providing stable phase compensation to the system. Also, it is possible to prevent rush current at power supply start-up by connecting a soft-start capacitor with the CS terminal (pin 18). The use of Error amplifier for soft-start detection makes it possible for a system to operate on a fixed soft-start time that is independent of the output load.
16
MB39A107
(5) Error amplifier block (Error Amp3) The error amplifier (Error Amp3) detects the DC/DC converter output voltage and outputs PWM control signals. An arbitrary output voltage can be set for 1 to 4 cells by connecting external output voltage setting resistors to the error amplifier inverting input pins. By connecting a feedback resistor and capacitor between FB23 terminal (pin 15) and - INE3 terminal (pin 16), it is possible to create any desired level of loop gain, thereby providing stable phase compensation to the system. Also, it is possible to prevent rush current at power supply start-up by connecting a soft-start capacitor with the CS terminal (pin 18). The use of Error amplifier for soft-start detection makes it possible for a system to operate on a fixed soft-start time that is independent of the output load. (6) Current detection amplifier block (Current Amp1) The current detection amplifier (Current Amp1) uses the +INC1 terminal (pin 5) and -INC1 terminal (pin 4) to detect a voltage drop which occurs between both ends of the sense resistor (RS2) due to the flow of the AC adapter current and outputs the signal amplified 25 times to the OUTC1 terminal (pin 3) . It is also possible to set an offset voltage equal to the voltage applied to the IOFA1 terminal (pin 6) . (7) Current detection amplifier block (Current Amp2) The current detection amplifier (Current Amp2) uses the +INC2 terminal (pin 12) and -INC2 terminal (pin 11) to detect a voltage drop which occurs between both ends of the output sense resistor (RS1) due to the flow of the charge current and outputs the signal amplified 25 times to the OUTC2 terminal (pin 10) . (8) PWM comparator block (PWM Comp.) The PWM comparator is a voltage-pulse width modulator that controls the output duty depending on the output voltage of error amplifier (Error Amp1, Error Amp2 and Error Amp3). The PWM comparator compares the triangular wave voltage generated by the triangular wave oscillator with the error amplifier output voltage. Then it turns on the output transistor on the main side and turns off the output transistor on the synchronous rectification side during the interval in which the triangular wave voltage is lower than the error amplifier output voltage. (9) Output block (Drv-1, Drv-2) The output circuit on the main side and on the synchronous rectification side are both in the totem pole configuration, capable of driving an external Nch MOS FET. (10) Charge pump block (Drv-CP) The CB terminal is a power supply terminal of output circuit (Drv-1) for the main side external Nch MOS FET drive. The CB terminal generates "VCC + about 5 V" in the OUT-CP terminal (pin 24) , VB terminal (pin 30) , and CB terminal (pin 29) by connecting the capacitor with SBD.
17
MB39A107
(11) Power supply control block Setting the CTL-1 terminal (pin 22) and CTL-2 terminal (pin 23) "L" level in the standby mode. (The supply current is 10 A at maximum in the standby mode.) Setting the CTL-1 and CTL-2 terminals "H" level allows the DC/DC converter and current detection amplifier (Current Amp1) to operate independently of each other. CTL function table CTL-1 L H L H (12) Bias voltage block 6 V (Typ) is as a power supply of the output circuit and potential for the charge pump output voltage setting. (13) Battery voltage detection comparator block ( - INEComp.) At least 95% of the battery set voltage is detected to turn off the output transistor of the output block (Drv-2) on the synchronous rectification side.
CTL-2 L L H H
DC/DC converter block OFF ON OFF ON
Current Amp1 OFF OFF ON ON
2. Protection Functions
(1) Under voltage lockout protection circuit block (VREF-UVLO) The momentary decrease in internal reference voltage (VREF) may cause malfunctions in the control IC, resulting in breakdown or degradation of the system. To prevent such malfunctions, under voltage lockout protection circuit detects internal reference voltage drop and fixes OUT-1 terminal (pin 28) and OUT-2 terminal (pin 26) to "L" level. The system restores voltage supply when the internal reference voltage reaches the threshold voltage of the under voltage lockout protection circuit. Protection circuit (VREF-UVLO)operation function table At UVLO operating (VRFE voltage is lower than UVLO threshold voltage.) The logic of following terminal is fixed. OUTD OUT-1 OUT-2 OUT-CP Hi-Z L L L
CS L
VB L
(2) Under voltage lockout protection circuit (VB-UVLO) The transient state or a momentary decrease in supply voltage, which occurs when the bias voltage (VB) for output circuit is turned on, may cause malfunction in the control IC, resulting in breakdown or degradation of the system. To prevent such malfunctions, under voltage lockout protection circuit detects a bias voltage drop, and fixes OUT1 terminal (pin 28) and OUT-2 terminal (pin 26) to "L" level. The system restores voltage supply when the power supply voltage or the internal reference voltage reaches the threshold voltage of the under voltage lockout protection circuit. 18
MB39A107
Protection circuit (VB-UVLO)operation function table At UVLO operating (VB voltage is lower than UVLO threshold voltage.) The logic of following terminals is fixed. OUT-1 OUT-2 OUT-CP L L L
CS L
(3) Under input voltage detection comparator block (UVComp.) Decrease of input voltage is detected and OUT-1 terminal (pin 28) and OUT-2 terminal (pin 26) are fixed to "L" level. In addition, an arbitrary detection voltage value can be set with an external resistor. The system restores voltage supply when the input voltage reaches or exceeds the threshold voltage of the under input voltage detection comparator. Protection circuit (UVComp.)operation function table At under input voltage detection (Input voltage is lower than UVComp. threshold voltage.) The logic of following terminals is fixed. OUT-1 OUT-2 OUT-CP L L L
CS L
3. Soft-start function
Soft-start block (SOFT) Connecting a capacitor to the CS terminal (pin 18) prevents rush currents from flowing upon activation of the power supply. Using the error amplifier to detect a soft-start allows to soft-start at constant setting time intervals independent of the output load of the DC/DC converter.
19
MB39A107
s SETTING THE CHARGING VOLTAGE
The charging voltage (DC/DC output voltage) can be set by connecting an external output voltage setting resistors (R1, R2) to the -INE3 terminal (pin 16) . Select a resistance value at which the ON resistance (35 at 1 mA) of the built-in FET connected to the OUTD terminal (pin 17) can be ignored. Battery charging voltage : Vo R1 + R2 x - INE3 (V) Vo (V) = R2
VO B
R1 -INE3 16 R2 17 OUTD
- + + 4.2 V
18 CS
s SETTING THE CHARGING CURRENT
The charge current value (output limit current) can be set depending on the voltage value at the +INE2 terminal (pin 13) . If a current exceeding the setting value attempts to flow, the charging voltage drops according to the setting current value. Battery charge current setting voltage : + INE2 + INE2 (V) = 25 x Ichg (A) x RS ()
s SETTING THE TRIANGULAR WAVE OSCILLATION FREQUENCY
The triangular wave oscillation frequency can be set by the timing resistor (RT) connected to the RT terminal (pin 19) . Triangular oscillation frequency : fOSC 23500 : fOSC (kHz) = RT (k) 20
MB39A107
s SETTING THE SOFT-START TIME
(1) Setting constant voltage mode soft-start For preventing rush current upon activation of IC, the IC allows soft-start using the capacitor (CS) connected to the CS terminal (pin 18) . When the CTL-1 terminal (pin 22) is placed under "H" level and IC is activated (threshold voltage of VCC UVLO) , and Q2 is turned off and the external soft-start capacitor (CS) connected to the CS terminal is charged at 10 A. The Error Amp3 output (FB23 terminal (pin 15) ) is determined by comparison between the lower voltage of the two non-inverted input terminal voltages (4.2 V and - CS terminal voltage) , and the inverted input terminal voltage (at the -INE3 terminal (pin 16) ) . FB23 during soft-start intervals (CS terminal voltage < 4.2 V) is therefore determined through comparison between the -INE3 terminal voltage and CS terminal voltage and the DC/DC converter output voltage is proportional to the CS terminal voltage rising as the external soft-start capacitor connected to the CS terminal is charged. The soft-start time is obtained by the following formula. Soft start time : ts (time to output voltage 100%) ts (s) = 0.42 x Cs (F) :
= 4.9 V : = 4.2 V :
CS terminal voltage Comparison voltage with Error Amp block - INE3 voltage
=0V :
t
Soft-start time : ts
* Soft-start circuit
VREF
10 A 10 A 16 - + + 18 4.2 V CS
-INE3
CS
Q2
UVLO
21
MB39A107
(2) Setting constant current mode soft-start For preventing rush current upon activation of IC, the IC allows soft-start using the capacitor (CS) connected to the CS terminal (pin 18) . When the CTL-1 terminal (pin 22) is placed under "H" level and IC is activated (threshold voltage of VCC UVLO) , and Q2 is turned off and the external soft-start capacitor (CS) connected to the CS terminal is charged at 10 A. The error Amp2 output (FB23 terminal (pin 15) ) is determined by comparison between the lower voltage of the two non-inverted input terminal voltages (at the +INE2 terminal (pin 13) and CS terminal) , and the inverted input terminal voltage (at the -INE2 terminal (pin 14) ) . FB23 during soft-start intervals (CS terminal voltage < +INE2) is therefore determined through comparison between the -INE2 terminal voltage and CS terminal voltage and the DC/DC converter output current is proportional to the CS terminal voltage rising as the external soft-start capacitor connected to the CS terminal is charged. The soft-start time is obtained by the following formula. Soft start time : ts (time to output voltage 100%) + INE2 ts (s) = : x Cs (F) 10 A = 4.9 V : + INE2 CS terminal voltage Comparison voltage with
Error Amp block - INE2 voltage
=0V :
t
Soft-start time : ts * Soft-start circuit
VREF
10 A 10 A -INE2 14 - + + 18 +INE2 CS 13 Q2 UVLO
CS
22
MB39A107
s PROCESSING WITHOUT USING OF THE SOFT-START FUNCTION
When soft-start function is not used, leave the CS terminal (pin 18) open. * When no soft-start function is specified
"Open"
CS 18
23
MB39A107
s I/O EQUIVALENT CIRCUIT
Reference voltage block
VCC 1 CTL-2 23 1.23 V + - 20 VREF 37.65 k 12.3 k GND 21 CTL-1 22 33.1 k 51 k GND 33.1 k 51 k
Control block
ESD protection element
ESD protection element
Soft-start block
VREF (5.0 V)
Triangular wave oscillator block
VREF (5.0 V)
Error amplifier block (Error Amp1)
VCC
18 CS 1.22 V + -
VREF (5.0 V) -INE1 8 19 RT CS 4.2 V 9 FB1
GND
GND GND 7 +INE1
Error amplifier block (Error Amp2)
VCC
Error amplifier block (Error Amp3)
VCC
VREF (5.0 V) -INE2 14 4.2 V 15 FB23 -INE3 16 CS 4.2V FB23
GND 13 +INE2
GND
Current detection amplfier block (Current Amp1)
VCC
Current detection amplfier block (Current Amp1 offset adjustment block)
VCC
+INC1 5 -IN 3 OUTC1 6 IOFA1
GND 4 -INC1
GND
(Continued)
24
MB39A107
(Continued) Current detection amplfier block (Current Amp2)
VCC
PWM comparator block
VCC
+INC2 12 10 OUTC2
FB1 FB23
CT
GND 11 -INC2
GND
Output block (Main side)
CB 29
Output block (synchronous rectification-side)
VB 30 VCC
Charge pump block
28 OUT-1
26 OUT-2
24 OUT-CP
PGND VS 27 GND PGND 25
Under input voltage detection comparator block
VCC VREF (5.0 V) 2 +INUV
Battery voltage detection comparator block
VCC VREF (5.0 V) -INE3
GND
GND
Bias voltage block
VCC
Prevent inefficient current block
30 VB 1.23 V
17 OUTD
GND
GND
25
Dead Time Modulation
26
C6 0.1 F To Microprocessor OUTC1 VCC 1 + - Offset adjustment VREF <-INEComp.> - (6.0 V) D4 C14 D5 Q1 L1 5.2 H -INE1 +INE1 7 4.2 V Drv -1 0.47 F 0.47 OUT-1 F 28 VS 27 26 C12 0.47 F Drv -CP 24 25 PGND OUT-CP OUT-2 C2 2.2 F C1 2.2 F Q2 3.92 V/4.00 V 8 CB 29 C13 + D3 A Ichg VO R8 33 m B VB Reg. VB 30 C15 1 F 4.05 V/4.20 V 3 2 5 4 6 + x25 - +INUV +INC1 -INC1
D1
R7
R4 R5
15 m
33 200 k k R6 100 k
MB39A107
R12
IOFA1
51 k
R11 51 k
C7 6800 pF - + + +
s APPLICATION EXAMPLE 1
R5
12 k
Chg_ctr + + - VREF -2.5 V -1.5 V Drv -2
R14 47 k
R17 100 k FB1
Battery D2 C3 2.2 F C4 2.2 F C5 2.2 F
9 R16 10 k -INE2 14 C8 6800 pF OUTC2 R24 10 R23 10 k 100 k 12 A +INC2 B 11 -INC2 + x25 - - + + 13
7 V to 25 V
R19 R20
+INE2
10 k H : UVLO, UV release
6.2 k
C19 10 pF
R35 1 k FB23
SW3 SW4 UVLO - + + 4.2 V VB UVLO VREF UVLO
R25 51 k
C18 C9 10 2200 OUTD pF pF 17 R21 R22 R18 R26 18 1.3 47 100 k k k k
15 R28 100 k R27 200 k -INE3 16
Output voltage (Battery voltage) is adjustable.
CTL-2 CurrentAmp1 ON/OFF VCC 23
VREF 10 A CS 18 CT 45 pF 19 RT R30 47 k VREF 4.2 V bias
CTL-1 DC/DC ON/OFF VREF 5.0 V 20 GND 21 22
C10 0.022 F
C11 0.1 F
MB39A107
s PARTS LIST 1
COMPONENT Q1, Q2, D1 D2, D5 D3, D4 L1 C1, C2 C3 to C5 C6, C11 C7, C8 C9 C10 C12 C13, C14 C15 C18, C19 R4 R5 R6 R7 R8 R11, R12 R14 R15 R16, R24 R17, R23, R26 R18, R30 R19 R20 R21 R22 R25 R27 R28 R35 Note : NEC ITEM Nch FET Diode Diode Diode Inductor Ceramics Condenser Ceramics Condenser Ceramics Condenser Ceramics Condenser Ceramics Condenser Ceramics Condenser Ceramics Condenser Ceramics Condenser Ceramics Condenser Ceramics Condenser Resistor Resistor Resistor Resistor Resistor Resistor Resistor Resistor Resistor Resistor Resistor Resistor Resistor Resistor Resistor Resistor Resistor Resistor Resistor SPECIFICATION VDS = 30 V, ID = 8.0 A VENDOR NEC PARTS No. PA2752 DEP5PC3 RB053L-30 FQ4JP3 CDRH104R-5R2 C3216JB1E225K C3225JB1H225K C1608JB1H104K C1608JB1H682K C1608JB1H222K C1608JB1H223K C3216JB1E474K C3216JB1H474K C3216JB1E105K C1608JB1H100K RR0816P-333-D RR0816P-204-D RR0816P-104-D SL1TTE15LOF SL1TTE33LOF RR0816P-513-D RR0816P-473-D RR0816P-123-D RR0816P-103-D RR0816P-104-D RR0816P-473-D RR0816P-103-D RR0816P-622-D RR0816P-183-D RR0816P-132-D RR0816P-513-D RR0816P-204-D RR0816P-104-D RR0816P-102-D
VF = 0.4 V (Max) , At IF = 2.5 A SHINDENGEN VF = 0.42 V (Max) , At IF = 3 A ROHM VF = 0.45 V (Max) , At IF = 100 mA ORIGIN 5.2 H 2.2 F 2.2 F 0.1 F 6800 pF 2200 pF 0.022 F 0.47 F 0.47 F 1 F 10 pF 33 k 200 k 100 k 15 m 33 m 51 k 47 k 12 k 10 k 100 k 47 k 10 k 6.2 k 18 k 1.3 k 51 k 200 k 100 k 1 k 5.5 A, 22 m 25 V 25 V 50 V 50 V 50 V 50 V 25 V 50 V 25 V 50 V 0.5% 0.5% 0.5% 1% 1% 0.5% 0.5% 0.5% 0.5% 0.5% 0.5% 0.5% 0.5% 0.5% 0.5% 0.5% 0.5% 0.5% 0.5% SUMIDA TDK TDK TDK TDK TDK TDK TDK TDK TDK TDK ssm ssm ssm KOA KOA ssm ssm ssm ssm ssm ssm ssm ssm ssm ssm ssm ssm ssm ssm
: NEC corporation SHINDENGEN : Shindengen Electric Manufacturing. Co., Ltd. : ROHM CO., LTD : Origin Electric Co., Ltd. : SUMIDA Corporation : TDK Corporation : SUSUMU CO., LTD : KOA Corporation
ROHM ORIGIN SUMIDA TDK ssm KOA
27
Dead Time Modulation
28
C6 0.1 F OUTC1 VCC 1 + - Offset adjustment VREF <-INEComp.> - (6.0 V) D4 C14 D5 Q1 L1 5.2H -INE1 +INE1 7 4.2 V Drv -1 0.47 F 0.47 OUT-1 F 28 VS 27 26 C12 0.47 F Drv -CP 24 25 PGND OUT-CP OUT-2 C2 2.2 F C1 2.2 F Q2 3.92 V/4.00 V 8 CB 29 C13 + D3 A Ichg VO R8 33 m B VB Reg. VB 30 C15 1 F 4.05 V/4.20 V 3 2 5 4 6 + x25 - +INUV +INC1 -INC1 IOFA1
D1
R4
R5
MB39A107
33 200 k k R6 100 k
R34
R33 30 k - + + +
s APPLICATION EXAMPLE 2
20 k
R1
R2
C7 6800 pF
56 180 k k R3 47 k VREF -2.5 V -1.5 V Drv -2
+ + -
Battery D2 C3 2.2 F C4 2.2 F C5 2.2 F
FB1 9 R16 10 k -INE2 14 C8 6800 pF OUTC2 R24 10 R23 10 k 100 k 12 A +INC2 B 11 -INC2 + x25 - - + + +INE2 13
7 V to 25 V
R19 R20
10 k H : UVLO, UV release
6.2 k
C19 10 pF
R35 1 k FB23
SW3 SW4 UVLO - + + 4.2 V
R25 51 k VB UVLO VREF UVLO
C18 C9 10 2200 OUTD pF pF 17 R21 R22 R18 R26 18 1.3 47 100 k k k k
15 R28 100 k R27 200 k -INE3 16
Output voltage (Battery voltage) is adjustable.
CTL-2 CurrentAmp1 ON/OFF VCC 23
VREF 10 A CS 18 CT 45 pF 19 RT R30 47 k VREF 4.2 V bias
CTL-1 DC/DC ON/OFF VREF 5.0 V 20 GND 21 22
C10 0.022 F
C11 0.1 F
MB39A107
s PARTS LIST 2
COMPONENT Q1, Q2 D1 D2, D5 D3, D4 L1 C1, C2 C3 to C5 C6, C11 C7, C8 C9 C10 C12 C13, C14 C15 C18, C19 R1 R2 R3 R4 R5 R6 R8 R16, R24 R18, R30 R19 R20 R21 R22 R23, R26 R25 R27 R28 R33 R34 R35 Note : NEC ITEM Nch FET Diode Diode Diode Inductor Ceramics Condenser Ceramics Condenser Ceramics Condenser Ceramics Condenser Ceramics Condenser Ceramics Condenser Ceramics Condenser Ceramics Condenser Ceramics Condenser Ceramics Condenser Resistor Resistor Resistor Resistor Resistor Resistor Resistor Resistor Resistor Resistor Resistor Resistor Resistor Resistor Resistor Resistor Resistor Resistor Resistor Resistor SPECIFICATION VDS = 30 V, ID = 8.0 A VENDOR NEC PARTS No. PA2752 DEP5PC3 RB053L-30 FQ4JP3 CDRH104R-5R2 C3216JB1E225K C3225JB1H225K C1608JB1H104K C1608JB1H682K C1608JB1H222K C1608JB1H223K C3216JB1E474K C3216JB1H474K C3216JB1E105K C1608JB1H100K RR0816P-563-D RR0816P-184-D RR0816P-473-D RR0816P-333-D RR0816P-204-D RR0816P-104-D SL1TTE33LOF RR0816P-103-D RR0816P-473-D RR0816P-103-D RR0816P-622-D RR0816P-183-D RR0816P-132-D RR0816P-104-D RR0816P-513-D RR0816P-204-D RR0816P-104-D RR0816P-303-D RR0816P-203-D RR0816P-102-D
VF = 0.4 V (Max) , At IF = 2.5 A SHINDENGEN VF = 0.42 V (Max) , At IF = 3 A ROHM VF = 0.45 V (Max) , At IF = 100 mA ORIGIN 5.2 H 2.2 F 2.2 F 0.1 F 6800 pF 2200 pF 0.022 F 0.47 F 0.47 F 1 F 10 pF 56 k 180 k 47 k 33 k 200 k 100 k 33 m 10 k 47 k 10 k 6.2 k 18 k 1.3 k 100 k 51 k 200 k 100 k 30 k 20 k 1 k 5.5 A, 22 m 25 V 25 V 50 V 50 V 50 V 50 V 25 V 50 V 25 V 50 V 0.5% 0.5% 0.5% 0.5% 0.5% 0.5% 1% 0.5% 0.5% 0.5% 0.5% 0.5% 0.5% 0.5% 0.5% 0.5% 0.5% 0.5% 0.5% 0.5% SUMIDA TDK TDK TDK TDK TDK TDK TDK TDK TDK TDK ssm ssm ssm ssm ssm ssm KOA ssm ssm ssm ssm ssm ssm ssm ssm ssm ssm ssm ssm ssm
: NEC corporation SHINDENGEN : Shindengen Electric Manufacturing. Co., Ltd. ROHM ORIGIN SUMIDA TDK ssm KOA : ROHM CO., LTD : Origin Electric Co., Ltd. : SUMIDA Corporation : TDK Corporation : SUSUMU CO., LTD : KOA Corporation
29
MB39A107
s REFERENCE DATA
Conversion Efficiency vs. Charge Current (constant voltage mode) Conversion efficiency (%)
100 95 90 85 80 75 70 65 60 55 50 0.0 0.5 1.0 1.5
Ta = + 25 C VIN = 19 V Charge voltage = 16.8 V setting SW1 = ON SW2 = ON SW3 = OFF SW4 = OFF TOTAL efficiency (%) = (Vo x Io) / (VIN x IIN) x 100
2.0
2.5
3.0
3.5
4.0
4.5
5.0
Charge current Io (A)
Conversion Efficiency vs. Charge Voltage (constant current mode) Conversion efficiency (%)
100 95 90 85 80 75 70 65 60 55 50 0 2 4 6
Ta = + 25 C VIN = 19 V Charge current = 4.5 A setting SW1 = ON SW2 = ON SW3 = OFF SW4 = OFF TOTAL efficiency (%) = (Vo x Io) / (VIN x IIN) x 100
8
10
12
14
16
Charge voltage Vo (V)
Charge Voltage vs. Charge Current (16.8 V setting)
18
Charge voltage Vo (V)
16 14 12 10 8 6 4 2 0 0.0 0.5
Ta = + 25 C VIN = 19 V Charge voltage = 16.8 V setting SW1 = ON SW2 = ON
SW3 = OFF SW4 = ON
SW3 = OFF SW4 = OFF SW3 = ON SW4 = OFF
1.0
1.5
2.0
2.5
3.0
3.5
4.0
4.5
5.0
Charge current Io (A)
(Continued)
30
MB39A107
(Continued)
* Switching Waveform (constant voltage mode)
Vs(V) 3 Ta = +25 C VIN = 19 V CTL1 = 5 V CTL2 = 5 V SW3 = OFF SW4 = OFF Vo = 16.8 V Io = 2 A
2 Vs 1
0 OUT1 OUT1(V) 20
OUT2(V) 10 0 OUT2 10 5 0
0
0.2
0.4
0.6
0.8
1.0
1.2
1.4
1.6
1.8
2.0 (ms)
* Switching Waveform (constant current mode)
Vs(V) 3 Ta = +25 C VIN = 19 V CTL1 = 5 V CTL2 = 5 V SW3 = OFF SW4 = OFF Vo = 10 V Io = 4.5 A
2 Vs 1
0 OUT1 OUT1(V) 20
OUT2(V) 10 0 OUT2 0 10 5
0
0.2
0.4
0.6
0.8
1.0
1.2
1.4
1.6
1.8
2.0 (ms)
31
MB39A107
* CTL function
* CTL1, CTL2 = LH constant voltage mode
VO (V) 15 10 5
VIN = 19 V Setting VO = 10
VO
OUTC1 (V) 0 OUTC1 5 0 CTL-1 CTL-2 (V) CTL2 5 0 0 2 4 6 8 10 12 14 16 18 20 (ms) 3 0 CTL-1 (V) 5
* CTL1, CTL2 = HL constant voltage mode
VO (V) 15 10 5 VO
VIN = 19 V Setting VO = 10
OUTC1 (V) 0 OUTC1 5 0 CTL-1 CTL-2 (V) CTL2 5 0 0 2 4 6 8 10 12 14 16 18 20 (ms) 0 CTL-1 (V) 5
(Continued)
32
MB39A107
(Continued)
* CTL1, CTL2 = LH constant current mode
VO (V) 15 10
VIN = 19 V Setting VO = 3
VO 5 OUTC1 (V) 0 OUTC1 5 0 CTL-1 CTL-2 (V) CTL2 5 0 0 2 4 6 8 10 12 14 16 18 20 (ms) 0 CTL-1 (V) 5
* CTL1, CTL2 = HL constant current mode
VO (V) 15 10 VO 5
VIN = 19 V Setting VO = 3
OUTC1 (V) 0 OUTC1 5 0 CTL-1 CTL-2 (V) CTL2 5 0 0 2 4 6 8 10 12 14 16 18 20 (ms) 0 CTL-1 (V) 5
33
MB39A107
s SELECTION OF COMPONENTS
* Nch MOS FET The Nch MOS FET for switching use should be rated for at least + 20% more than the maximum input voltage. To minimize continuity loss, use a FET with low RDS (ON) between the drain and source. For high input voltage and high frequency operation, on/off-cycle switching loss will be higher so that power dissipation must be considered. In this application, the PA2752 (NEC products) is used. Continuity loss, on/off switching loss and total loss are determined by the following formulas. The selection must ensure that peak drain current does not exceed rated values. Continuity loss : Pc PC = ID2 x RDS (ON) x Duty
On-cycle switching loss : PS (ON) PS (ON) = VD (Max) x ID x tf x fOSC 6
Off-cycle switching loss : PS (OFF) PS (OFF) = VD (Max) x ID (Max) x tf x fOSC 6
Total loss : PT PT = PC + PS (ON) + PS (OFF)
Example) Using the PA2752 Setting 16.8V Main side Input voltage VIN (Max) = 25 V, output voltage VO = 16.8 V, drain current ID = 4.5 A, oscillation frequency fOSC = 500 kHz, L = 5.2 H, drain-source on resistance RDS (ON) = 20 m, tr = 6.2 ns, tf = 5.8 ns : Drain current (Max) : ID (Max) ID (Max) = Io + VIN (Max) - Vo 2L 25 - 16.8 2 x 5.2 x 10
-6
ton x 1 500 x 103 x 0.672
= 4.5 + = 5.56 A :
Drain current (Min) : ID (Min) ID (Min) = Io - VIN (Max) - Vo 2L 25 - 16.8 2 x 5.2 x 10 - 6 ton x 1 500 x 103 x 0.672
= 4.5 - = 3.44 A :
34
MB39A107
= = = : ID2 x RDS (ON) x Duty 4.52 x 0.02 x 0.672 0.272 W VD (Max) x ID x tr x fOSC 6 25 x 4.5 x 6.2 x 10 - 9 x 500 x 103 6
PC
PS (ON) = =
= 0.058 W : VD (Max) x ID (Max) x tf x fOSC 6 25 x 5.56 x 5.8 x 10 - 9 x 500 x 103 6
PS (OFF) = =
= 0.067 W : PT = PC + PS (ON) + PS (OFF) = 0.272 + 0.058 + 0.067 : = 0.397 W : The above power dissipation figures for the PA2752 are satisfied with ample margin at 2 W (Ta = + 25 C). Synchronous rectification side Input voltage VIN (Max) = 25 V, output voltage Vo = 16.8 V, drain current ID = 4.5 A, oscillation frequency fOSC = 500 kHz, L = 5.2 H, drain-source on resistance RDS (ON) = 20 m, tr = 6.2 ns, tf = 5.8 ns : Drain current (Max) : ID (Max) ID (Max) = Io + Vo 2L toff 16.8 2 x 5.2 x 10 - 6 x 1 500 x 103 x (1 - 0.672)
= 4.5 + = 5.56 A :
Drain current (Min) : ID (Min) ID (Min) = Io - Vo 2L toff 16.8 2 x 5.2 x 10
-6
= 4.5 - = : 3.44 A
x
1 500 x 103
x
(1 - 0.672)
35
MB39A107
= = = : ID2 x RDS (ON) x Duty (OFF) 4.52 x 0.02 x (1 - 0.672) 0.133 W VF x ID x tr x fOSC 6 0.45 x 4.5 x 6.2 x 10 - 9 x 500 x 103 6
PC
PS (ON) = =
= 0.001 W : VF x ID (Max) x tf x fOSC 6 0.45 x 5.56 x 5.8 x 10 - 9 x 500 x 103 6
PS (OFF) = =
= 0.001 W : PT = PC + PS (ON) + PS (OFF) = 0.133 + 0.001 + 0.001 : = 0.135 W : The above power dissipation figures for the PA2752 are satisfied with ample margin at 2 W (Ta = + 25 C). Setting 12.6V Main side Input voltage VIN (Max) = 20 V, output voltage Vo = 12.6 V, drain current ID = 4.5 A, oscillation frequency fOSC = 500 kHz, L = 5.2 H, drain-source on resistance RDS (ON) = 20 m, tr = 6.2 ns, tf = 5.8 ns : Drain current (Max) : ID (Max) ID (Max) = Io + VIN (Max) - Vo 2L 20 - 12.6 2 x 5.2 x 10 - 6 ton x 1 500 x 103 x 0.63
= 4.5 + = 5.40 A :
Drain current (Min) : ID (Min) ID (Min) = Io - VIN (Max) - Vo 2L 20 - 12.6 2 x 5.2 x 10
-6
ton x 1 500 x 103 x 0.63
= 4.5 - = 3.60 A : 36
MB39A107
= = = : ID2 x RDS (ON) x Duty 4.52 x 0.02 x 0.63 0.255 W VD (Max) x ID x tr x fOSC 6 20 x 4.5 x 6.2 x 10 - 9 x 500 x 103 6
PC
PS (ON) = =
= 0.047 W : VD (Max) x ID (Max) x tf x fOSC 6 20 x 5.40 x 5.8 x 10 - 9 x 500 x 103 6
PS (OFF) = =
= 0.052 W : PT = PC + PS (ON) + PS (OFF) = 0.255 + 0.047 + 0.052 : = 0.354 W : The above power dissipation figures for the PA2752 are satisfied with ample margin at 2 W (Ta = + 25 C). Synchronous rectification side Input voltage VIN (Max) = 20 V, output voltage Vo = 12.6 V, drain current ID = 4.5 A, oscillation frequency fOSC = 500 kHz, L = 5.2 H, drain-source on resistance RDS (ON) = 20 m, tr = 6.2 ns, tf = 5.8 ns : Drain current (Max) : ID (Max) ID (Max) = Io + Vo 2L toff 12.6 2 x 5.2 x 10 - 6 x 1 500 x 103 x (1 - 0.63)
= 4.5 + = 5.40 A :
Drain current (Min) : ID (Min) ID (Min) = Io - Vo 2L toff 12.6 2 x 5.2 x 10
-6
= 4.5 - = 3.60 A :
x
1 500 x 103
x
(1 - 0.63)
37
MB39A107
= = = : ID2 x RDS (ON) x Duty (OFF) 4.52 x 0.02 x (1 - 0.63) 0.150 W VF x ID x tr x fOSC 6 0.45 x 4.5 x 6.2 x 10 - 9 x 500 x 103 6
PC
PS (ON) = =
= 0.001 W : VF x ID (Max) x tf x fOSC 6 0.45 x 5.40 x 5.8 x 10 - 9 x 500 x 103 6
PS (OFF) = =
= 0.001 W : PT = PC + PS (ON) + PS (OFF) = 0.15 + 0.001 + 0.001 : = 0.152 W : The above power dissipation figures for the PA2752 are satisfied with ample margin at 2 W (Ta = + 25 C). * Inductor In selecting inductors, it is of course essential not to apply more current than the rated capacity of the inductor, but also to note that the lower limit for ripple current is a critical point that if reached will cause discontinuous operation and a considerable drop in efficiency. This can be prevented by choosing a higher inductance value, which will enable continuous operation under light loads. Note that if the inductance value is too high, however, direct current resistance (DCR) is increased and this will also reduce efficiency. The inductance must be set at the point where efficiency is greatest. Note also that the DC superimposition characteristic become worse as the load current value approaches the rated current value of the inductor, so that the inductance value is reduced and ripple current increases, causing loss of efficiency. The selection of rated current value and inductance value will vary depending on where the point of peak efficiency lies with respect to load current. Inductance values are determined by the following formulas. The L value for all load current conditions is set so that the peak to peak value of the ripple current is 1/2 the load current or less. Inductance value : L L 2 (VIN - VO) IO ton
38
MB39A107
16.8 V output Example : 2 (VIN (Max) - VO) L ton IO 2 x (25 - 16.8) 4.5 x 1 500 x 103 x 0.672
4.9 H 12.6 V output Example : 2 (VIN (Max) - VO) L ton Io 2 x (20 - 12.6) 4.5 x 1 500 x 103 x 0.63
4.1 H Inductance values derived from the above formulas are values that provide sufficient margin for continuous operation at maximum load current, but at which continuous operation is not possible at light loads. It is therefore necessary to determine the load level at which continuous operation becomes possible. In this application, the SUMIDA CDRH104R-5R2 is used. The following formula is available to obtain the load current as a continuous current condition when 5.2 H is used. Load current value under continuous operating conditions : Io IO VO 2L toff
Example : Using the CDRH104R-5R2 5.2 H (tolerance 20% ), rated current = 5.5 A 16.8 V output VO IO toff 2L 16.8 2 x 5.2 x 10 - 6 x 1 500 x 103 x (1 - 0.672)
1.06 A
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MB39A107
12.6 V output VO IO toff 2L 12.6 2 x 5.2 x 10
-6
x
1 500 x 103
x
(1 - 0.63)
0.897A To determine whether the current through the inductor is within rated values, it is necessary to determine the peak value of the ripple current as well as the peak-to-peak values of the ripple current that affect the output ripple voltage. The peak value and peak-to-peak value of the ripple current can be determined by the following formulas. Peak Value : IL IL Io + VIN - VO 2L ton
Peak-Peak Value : IL IL = VIN - VO L ton
Example : Using the CDRH104R-5R2 5.2 H (tolerance 20% ), rated current = 5.5 A Peak Value 16.8 V output IL Io + 4.5 + 5.56 A 12.6 V output IL IO + 4.5 + 5.40 A VIN (Max) - VO 2L 20 - 12.6 2 x 5.2 x 10 - 6 ton x 1 500 x 103 x 0.63 VIN (Max) - VO 2L 25 - 16.8 2 x 5.2 x 10 - 6 ton x 1 500 x 103 x 0.672
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MB39A107
Peak-Peak Value 16.8 V output VIN (Max) - Vo IL = L = 25 - 16.8 5.2 x 10
-6
ton x 1 500 x 103 x 0.672
= 2.12 A : 12.6 V output VIN (Max) - Vo IL = L = 20 - 12.6 5.2 x 10
-6
ton x 1 500 x 103 x 0.63
= 1.79 A : * Diode for charge pump Using a low-leak diode increases efficiency a little; but using a signal diode is satisfactory. It is recommended to use a low-VF one. Also, use a capacitor for the charge pump, which is sufficiently larger value than the gate capacitor for the main-side FET. It is recommended to use a component between 0.1 F to 1.0 F.
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MB39A107
s NOTES ON USE
* Take account of common impedance when designing the earth line on a printed wiring board.
* Take measures against static electricity. * For semiconductors, use antistatic or conductive containers. * When storing or carrying a printed circuit board after chip mounting, put it in a conductive bag or container. * The work table, tools, and measuring instruments must be grounded. * The worker must put on a grounding device containing 250 k to 1 M resistors in series. * Do not apply a negative voltage. * Applying a negative voltage of -0.3 V or less to an LSI may generate a parasitic transistor, resulting in malfunction.
42
MB39A107
s ORDERING INFORMATION
Part number MB39A107PFT Package 30-pin plastic TSSOP (FPT-30P-M04) Remarks
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MB39A107
s PACKAGE DIMENSION
30-pin plastic TSSOP (FPT-30P-M04)
7.800.10(.307.004) "A" Details of "A" part 0~8 1.10(.043) MAX 4.40 -0.10 6.400.10 +.008 .173 -.004 (.252.004) 0.25(.010)
+0.20
0.600.10 (.024.004)
INDEX
0.100.05 (.004.002)
0.50(.020)
0.200.03 (.008.001)
0.3865(.0152)
0.1270.03 (.005.001)
0.10(.004) 7.00(.276)
0.900.05 (.035.002) 0.3865(.0152)
C
2001 FUJITSU LIMITED F30007SC-1-1
Dimensions in mm (inches) Note : The values in parentheses are reference values.
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MB39A107
FUJITSU LIMITED
All Rights Reserved. The contents of this document are subject to change without notice. Customers are advised to consult with FUJITSU sales representatives before ordering. The information, such as descriptions of function and application circuit examples, in this document are presented solely for the purpose of reference to show examples of operations and uses of Fujitsu semiconductor device; Fujitsu does not warrant proper operation of the device with respect to use based on such information. When you develop equipment incorporating the device based on such information, you must assume any responsibility arising out of such use of the information. Fujitsu assumes no liability for any damages whatsoever arising out of the use of the information. Any information in this document, including descriptions of function and schematic diagrams, shall not be construed as license of the use or exercise of any intellectual property right, such as patent right or copyright, or any other right of Fujitsu or any third party or does Fujitsu warrant non-infringement of any third-party's intellectual property right or other right by using such information. Fujitsu assumes no liability for any infringement of the intellectual property rights or other rights of third parties which would result from the use of information contained herein. The products described in this document are designed, developed and manufactured as contemplated for general use, including without limitation, ordinary industrial use, general office use, personal use, and household use, but are not designed, developed and manufactured as contemplated (1) for use accompanying fatal risks or dangers that, unless extremely high safety is secured, could have a serious effect to the public, and could lead directly to death, personal injury, severe physical damage or other loss (i.e., nuclear reaction control in nuclear facility, aircraft flight control, air traffic control, mass transport control, medical life support system, missile launch control in weapon system), or (2) for use requiring extremely high reliability (i.e., submersible repeater and artificial satellite). Please note that Fujitsu will not be liable against you and/or any third party for any claims or damages arising in connection with above-mentioned uses of the products. Any semiconductor devices have an inherent chance of failure. You must protect against injury, damage or loss from such failures by incorporating safety design measures into your facility and equipment such as redundancy, fire protection, and prevention of over-current levels and other abnormal operating conditions. If any products described in this document represent goods or technologies subject to certain restrictions on export under the Foreign Exchange and Foreign Trade Law of Japan, the prior authorization by Japanese government will be required for export of those products from Japan.
F0312 (c) FUJITSU LIMITED Printed in Japan
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